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Superscalar Pipeline

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  • Register Files need four read ports, as two simultaneous instructions perform two reads each.
  • Two ALUs are used.
  • Only the bottom pipeline can access the memory. However, both pipelines have the M stage.

Pipeline Diagram

ADD   F   D   A0  A1  W
LD        F   D   B0  B1  W
LD            F   D   B0  B1  W
ADD               F   D   A0  A1  W