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Pipeline Diagram Timing

Timing the Pipeline Diagram

While correcting papers, I saw many strange ways of measuring the time taken for a pipelined program to execute. These aren't silly mistakes, but fundamental conceptual misconceptions.

Pipeline Diagrams go Left to Right

This may be obvious, but a lot of people don't consider this during their calculations

t = 1 cycle
   1  2  3  4
1  F
2
3

t = 2 cycles
   1  2  3  4
1  F  D
2     F
3

t = 3 cycles
   1  2  3  4
1  F  D  X
2     F  D
3        F

and so on

Each Phase takes the Same Time

The minimum time that could be taken by a phase is not the amount of time that it actually takes in execution. Think about students at mess. The waiting for Corn Flakes is typically much less than that of Omelettes. Yet, the line proceeds at the slowest pace, which is that of the Omelette.

Just like that, each cycle of a processor takes the time equal to the longest phase. If F finishes before D, it still has to wait for D to finish before sending the data into that phase, as there cannot be two instructions in the same phase.

Total Time Formula

\[\begin{align} &t_{cycle} = max(t_F, t_D, t_X, t_M, t_W)\\ &t = t_{cycle} \times n_{cycles}\ \end{align}\]

There may be some other overheads in practical processors, but we will not consider them for this course.