Cache Structure

1) Cache 2) Cache Set - an n-way associative set with n cache blocks in it 3) Cache Block - contains k lines in it 4) Cache Line - contains l bytes in it

Consider a 32-bit machine with a set-associative cache. The total cache size is 16KB, and it is a 4-way set-associative cache. The length of the memory location is 1 byte, and the block size is 16 Bytes. Each memory address is 32 bit long (assume).

In this scenario, the word size is 4B. Each set has 4 blocks or 64B in it. Each cache block has 4 lines in it.

The cache has 2^8 sets in it. Representing a cache set requires 8 bits. Each cache block has 16 bytes in it. Representing a byte requires 4 bits.

Therefore, we have an addressing system that looks as such

|---------TAG----------|--INDEX--|--OFFSET--|
32                    12         4          0

First, we look for the cache set with the matching index. Then, we locate the block with the matching tag (assuming we have a cache hit). Then, we pick the address at the given offset in the block.